The present invention relates to a controller for allocating areas of a cache memory in an information processing system having a central processing unit, the controller with the cache memory, and storage units, and to a method of controlling allocation of areas of a cache memory.
In a process of data transfer between a central processing unit and cache memory, updated data in the cache memory is called write-after data. A process of writing the write-after data within the cache memory into a disk unit, is called a write-after (write back) process. This write-after process is described, e.g., in JP-B-59-7986 and JP-A-62-198946.
The controller described in JP-B-59-7986 writes write-after data within a cache memory of the controller into a disk unit, by means of a first-in/first-out (FIFO) control or least recently used (LRU) control.
The controller described in JP-A-62-198946 responds to a write request from a central processing unit (CPU), and transfers data from the CPU to the cache memory if the cache has write-after data less than a predetermined amount. If the cache memory has write-after data more than the predetermined amount, data is transferred from the CPU to a disk unit, and thereafter, the write-after data in the cache memory is written into a disk unit.
Upon reception of a read request from the CPU, if the request data is not present in the cache memory and if the data to be deleted from the cache in order to store the requested data in the cache is write-after data, then the write-after data is written into a disk unit, and thereafter the requested data is read from a disk unit to transfer it to the CPU and also to store it in the cache memory.
Upon reception of a write request from the CPU, the controller transfers data from the CPU to the cache memory to store write-after data ill the cache. The controller writes the write-after data in the cache memory asynchronously with the write request.
A disk unit has a plurality of disks as recording media, and data read/write heads provided for respective data recording surfaces of the disks. A circular data recording unit relative to which the head can read/write data while the disk rotates once, is called a track. A plurality of tracks are formed on the disk surface. An operation of moving the head to a track position where the head can read/write data, is called a seek operation. In the write-after control, in response to a write request from the CPU, data is transferred from the CPU to the cache memory. Therefore, time is not required for the seek operation, allowing high speed response.
The contents of data except write-after data in the cache memory, i.e., data already written in a disk unit, are the same as the data in the disk unit. Therefore, such data can be deleted from the cache memory at any time. However, the contents of write-after data within the cache memory are not the same as the corresponding data in a disk unit, so that such data cannot be deleted from the cache unless it has been written in a disk unit.
If write-after data completely fills the cache memory, new write-after data cannot be generated unless the write-after data within the cache has been written in a disk unit. Writing write-after data within the cache into a disk unit necessarily requires time for the seek operation, being unable to expect high speed response in the write-after control.
The contents and occurrence frequency of a request to be issued to a disk unit are not constant, but depend on the data stored in the disk unit. For example, assuming that a request is issued to a certain disk unit at a high occurrence frequency to generate a great amount of write-after data, the amount of write-after data which other disk units can generate is considerably limited since there is only one cache memory. In such a case, an apparent disk performance as viewed from the CPU is such that the performance of the disk unit which generated a great number of write-after data is superior to other disk units. A disk unit actually requiring high speed response is not allowed to generate a great amount of write-after data, but a disk unit which occupied the cache memory faster can generate a great amount of write-after data.
It is therefore important to distributively allocate a proper fraction of capacity of the cache memory to each disk unit. If write-after data fills the cache memory, all disk units are inhibited from undergoing a write-after process, degrading the performance of the whole system. Such a case can be avoided by distributively allocating a proper fraction of capacity of the cache memory to each disk unit.
However, the above-cited related art JP-B-59-7986 does not consider proper allocation of capacity of the cache memory to each disk unit. Although the other related art JP-A-62-198946 can effectively limit the total amount of write-after data in the cache memory, it does not consider proper allocation of capacity of the cache memory to each disk unit.